The phase-locked loop (or PLL) is an electronic circuit well known per se, comprising a controlled-frequency oscillator (generally a voltage controlled oscillator, or VCO) and a closed-loop corrector, or controller, generating a signal for driving the said oscillator so as to slave its output signal to a reference signal (the corrector is also called a “filter”, since in the simplest embodiments it is a low-pass filter). It is used notably to produce frequency synthesizers; indeed, by introducing a frequency divider into the feedback loop of the corrector, an output signal of the VCO is obtained at a frequency which is a multiple of the reference signal, generated for example by a quartz oscillator.
The output signal of the VCO (and therefore of the PLL) is inevitably affected by phase noise, which has multiple origins. The main sources of phase noise are the reference oscillator, generating the reference signal, and the frequency controlled oscillator. The corrector is generally designed in such a way as to minimize the influence of these sources of noise in the spectral operating band of the phase-locked loop, that is to say, to reject the phase noise in a given frequency band.
As will be explained in greater detail hereinafter, however, in a phase-locked loop known from the prior art, a fundamental limit exists to the rejection of the phase noise. More precisely, it is possible to demonstrate that the corrector cannot effectively filter, at one and the same frequency, the reference phase noise and that due to the VCO. To obtain an output signal with low phase noise despite this intrinsic limitation, it is necessary to use very high-quality—and therefore expensive—VCOs and reference oscillators that are difficult to integrate on silicon technologies and/or high-order correctors. Even when taking these precautions, the intrinsic limitations of the conventional architecture of phase-locked loops prevent sufficiently effective noise filtering for certain applications.